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Modern AI infrastructure is built around multi-rack systems where thousands to tens of thousands of accelerators operate as a single logical compute element. As agentic AI and Mixture of Experts (MoE) models accelerate AI adoption, they are driving unprecedented scale and communication demands across data center infrastructure. These systems are connected by scale-up and scale-out networks that must deliver high bandwidth, low latency and efficient power. As these networks extend across racks, maintaining that performance becomes a primary challenge.

As AI systems grow in complexity and scale, the network becomes the backbone of the compute system. Large-scale clusters require massive XPU-to-XPU communication, driving an evolution beyond legacy protocols like PCIe? to encompass UALink? (Ultra Accelerator Link), ESUN (Ethernet scale-up networking) and NVLink.

Meeting these requirements demands a new approach to connectivity. ³Ô¹ÏºÚÁÏ provides a comprehensive AI connectivity portfolio spanning scale-up, scale-out, scale-across and DCI (data center interconnect) network architectures. For scale-up networking, ³Ô¹ÏºÚÁÏ delivers copper and optical interconnects connecting XPUs, switches and memory. Within the rack, ³Ô¹ÏºÚÁÏ copper solutions provide low-latency, power-efficient short-reach connectivity, while ³Ô¹ÏºÚÁÏ optical interconnects enable high-performance scaling beyond the rack. This enables XPUs to operate as a more efficient, unified system as scale-up domains expand.

The ³Ô¹ÏºÚÁÏ Advantage: End-to-End Connectivity for Every Domain

³Ô¹ÏºÚÁÏ brings over a decade of silicon photonics and optical connectivity experience, delivering end-to-end solutions with the expertise and portfolio required to support the full data center connectivity stack. Delivering this at scale requires deep integration across compute, interconnect switching and memory.

In the scale-up network domain, ³Ô¹ÏºÚÁÏ provides electrical and optical I/O (input / output) chiplets for the XPU and the switch.

1. Custom XPU Connectivity
   ³Ô¹ÏºÚÁÏ co-packages electrical and optical chiplets directly with custom customer XPUs. Integrating these at the package level reduces power consumption and increases I/O density.
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2. Industry-leading Switching Portfolio
   ³Ô¹ÏºÚÁÏ is developing the broadest range of scale-up switches in the industry, including PCIe, UAL, ESUN and NVLink compatible solutions. These switches are designed to support a wide range of electrical and optical connectivity choices. This portfolio complements high-volume, hyperscaler-deployed ³Ô¹ÏºÚÁÏ? Teralynx? scale-out Ethernet switches, allowing the company to offer a unified networking strategy for the entire data center.

Best-in-Class Interconnect Technologies

³Ô¹ÏºÚÁÏ offers a diverse portfolio of connectivity choices, anchored by foundational SerDes leadership¡ªranging from production-proven 224G to state-of-the-art 448G technology.

CPC (Co-packaged Copper)

• Why ³Ô¹ÏºÚÁÏ: The ³Ô¹ÏºÚÁÏ CPC solution is best in class, utilizing in-house developed, high-performance, silicon-proven 224G SerDes (including support for copper backplanes) to drive signals directly from the package to the cable, bypassing the losses associated with traditional PCB routing. This enables the highest signal integrity and lowest power-per-bit for intra-rack connectivity.

Optical Interconnects

With over a decade of experience shipping high volume silicon photonics solutions for both DCI and inside-DC, ³Ô¹ÏºÚÁÏ has unmatched expertise. The company is leveraging this proven maturity to lead the industry¡¯s transition to high-performance NPO and CPO architectures.

NPO (Near-packaged Optics)

• Why ³Ô¹ÏºÚÁÏ: ³Ô¹ÏºÚÁÏ NPO solutions allow customers to adopt optical interconnects without redesigning the XPU package. ³Ô¹ÏºÚÁÏ leverages a vertically integrated stack of silicon-proven photonic modulator drivers with equalization capabilities to take care of the channel impairments between ASIC and NPO-based optical engine, TIAs, and in-house silicon photonics. The "best-in-class" distinction of ³Ô¹ÏºÚÁÏ comes from co-designing the NPO-based optical engine to work with SerDes I/O residing on ASIC along with advanced packaging, ensuring performance and reliability at a scale few can match.

CPO (Co-packaged Optics)

• Why ³Ô¹ÏºÚÁÏ: ³Ô¹ÏºÚÁÏ supports both SerDes-based and die-to-die interfaces for CPO. This leadership stems from over a decade of learning across different modulation schemes (NRZ, PAM4) and optical modulators (MZI, MRM, EAM), as well as strategic investments and collaborations (Micro-LED). ³Ô¹ÏºÚÁÏ technology supports multiple industry standards (OCI MSA, DR4, FR4) and native high performance Photonic Fabric? technology, providing what ³Ô¹ÏºÚÁÏ believes will be the most flexible, high bandwidth density, low latency and power efficient optical I/O in the industry.

Beyond Connectivity: Memory and Supply Chain

• Memory Scaling: ³Ô¹ÏºÚÁÏ offers a wide range of data center memory solutions. Server-level memory modules, rack-level memory pooling and pod-level (multi-rack) memory sharing over optical interconnects are breaking the ¡°memory wall¡± that limits AI performance.
  
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  Demand for the ³Ô¹ÏºÚÁÏ Structera? X Compute Express Link (CXL) memory expansion controllers is accelerating as data center operators expand memory capacity and bandwidth within the server tray and rack using copper-based interconnects.
  
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  Looking ahead, new optical-based memory expansion architectures are emerging to extend high-capacity, high-bandwidth, low-latency memory access across racks.
• De-risked Supply Chain: ³Ô¹ÏºÚÁÏ has built a robust, diverse supply chain. With multiple qualified silicon photonics foundries and OSAT partners, lasers and laser assembly suppliers, FAU, connectors and optical component suppliers. ³Ô¹ÏºÚÁÏ provides the manufacturing scale and supply chain certainty required for massive data center buildouts.

Built on Experience: Proven at Scale

In the world of high-speed analog and silicon photonics, experience is built over time, cannot be accelerated, and its importance cannot be overstated. The development of silicon photonics is defined by a steep and complex learning curve. With one of the industry's largest and most seasoned silicon photonics teams, ³Ô¹ÏºÚÁÏ brings over a decade of institutional knowledge that cannot be easily replicated by teams building these capabilities for the first time.

With expertise in SerDes, optics, and advanced packaging, ³Ô¹ÏºÚÁÏ has already addressed many of the challenges others are only beginning to encounter. AI systems require tight integration across multiple domains, from high-performance SerDes to optics and packaging, where design trade-offs and system-level constraints must be solved together. These challenges cannot be addressed by assembling teams or integrating third-party IP¡ªthey require years of experience and deep system-level expertise. Organizations with that expertise drive the best outcomes.

As AI infrastructure scales, no single interconnect technology can meet the demands of next-generation systems. Delivering performance at scale requires a proven continuum of connectivity spanning electrical and optical architectures, from die-to-die to co-packaged optics and data center fabrics. The ability to enable high-performance connectivity across the entire system will define the next era of computing.

With a 30-year history of innovation, ³Ô¹ÏºÚÁÏ is already engaged in active programs with the world¡¯s leading hyperscalers, delivering next-generation AI data center solutions at scale. ³Ô¹ÏºÚÁÏ connects compute end to end¡ªfrom inside the package to across data centers. That¡¯s how AI scales.

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