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Visit ³Ô¹ÏºÚÁÏ at ITC India 2025

Come visit ³Ô¹ÏºÚÁÏ at ITC India 2025 where design, test, and yield professionals can confront challenges faced by the industry, and learn how these challenges are being addressed by the combined efforts of academia, design tool and equipment suppliers, designers, and test engineers.

³Ô¹ÏºÚÁÏ Participation

Industry Test-Challenges
Date: July 20, 2025
Chair: Nikhil Sudhakaran, Director, Custom Silicon Engineering

Industry Test-Challenges Technical Session
Topic: DFT Implementation Challenges for Clock Mesh/Grid-based Clocking Architecture
Date: July 20, 2025
³Ô¹ÏºÚÁÏ Speakers: Sainath Kartik Yeshagol, Senior Principal Engineer, Custom Silicon and Shubham Shrivastava, senior engineer, Custom Silicon Engineering

Panel Discussion
Topic: India's Semiconductor Test Ecosystem: Building for Scale and Innovation
Date: July 21, 2025
Moderator: Navin Bishnoi, AVP & ³Ô¹ÏºÚÁÏ India-Country Manager

Technical Presentation
Topic: Tester time savings for LBIST diagnostics using enhanced version of On-chip MISR signature comparison with self-test and bypass
Date: July 21, 2025
³Ô¹ÏºÚÁÏ Speaker: Udyavar Jaidev Shenoy, Sr. Staff Manager, Custom-Silicon Engineering

Test-Reality Check
Topic: Incremental Memory Repair Techniques with Synopsys SMS for Multi-hierarchy Server Architecture
Date: July 22, 2025
³Ô¹ÏºÚÁÏ Speaker: Ajay Chauhan, Senior Staff Engineer, Custom-Silicon Engineering

Distinguished Address
Topic: Advanced Yield Analysis Capabilities for the Hyperscaler Era
Date: July 22, 2025
³Ô¹ÏºÚÁÏ Speaker: Kort Longenbach, Senior Director, Test Solutions Engineering